SELECTED PUBLICATIONS 

A. SELECTED PUBLICATIONS ON SOI TECHNOLOGY

 a) Characterization Techniques

P.K. McLarty, D.E. Ioannou, and J. P. Colinge, "Bulk Traps in Ultrathin SIMOX MOSFETs by Current DLTS," IEEE Electron Device Leters, 9, 545‑547 (1988)

D.E. Ioannou, S. Cristoloveanu, M. Mukherjee, and B. Mazhari, "Characterization of Carrier Generation in Enhancement‑Mode SOI MOSFET's", IEEE Electron Device Letters, 11, 409‑411 (1990)  

S.P. Sinha, A. Zaleski, and D.E. Ioannou, "Investigation of Carrier Generation in Fully-Depleted Enhancement and Accumulation Mode SOI MOSFET's," IEEE Trans. On Electron Devices, 41, 2413-2416 (1994)

D.E. Ioannou, X. Zhong, B. Mazhari, G.J. Campisi, and H.L. Hughes, "Interface Characterization by the Dynamic Transconductance Technique", IEEE Electron Device Letters, 12, 430‑432 (1991)

X. Zhao and D. E. Ioannou, "Gated-Diode in SOI MOSFET’s: a Sensitive Tool for Characterizing the Buried Si/SiO₂ Interface," IEEE Trans. on Electron Devices, 48, 685-687, (2001)

T. Ouisse, T. Elewa, S. Cristoloveanu, H. Haddara, G. Borel, and D.E. Ioannou, "Adaptation of the Charge Pumping Technique to Gated P‑I‑N Diodes Fabricated on Silicon‑on‑Insulator", IEEE Trans.on Electron Devices, 38, 1432-1444 (1991).

 b) Device Physics/Design

 S. Cristoloveanu and D.E. Ioannou, "Adjustable Confinement of the Electron Gas in Dual‑Gate SOI MOSFET's", Superlattices and Microstructures, 8, 131‑135 (1990).

 B. Mazhari, S. Cristoloveanu, D.E. Ioannou, and A.L. Caviglia, “Properties of Ultra‑Thin Wafer‑Bonded Silicon‑on‑Insulator MOSFET's,” IEEE Trans. on Electron Devices,38, 1289‑1295 (1991).

 B. Mazhari and D.E. Ioannou, "Surface Potential at Threshold in Thin‑Film SOI MOSFET's", IEEE Trans. on Electron Devices, 40, 1129‑1133 (1993).

 D. E. Ioannou, F. L. Duan, S. P. Sinha, and A. Zaleski, “Opposite-Channel-Based Injection of Hot-Carriers in SOI MOSFETs: Physics and Applications”, IEEE Trans. on Electron Devices, 45, 1147-1154, May 1997.

 A. Zaleski, D.E. Ioannou, D. Flandre, and J.P. Colinge, "Design and Performance of a New Flash EEPROM on SOI (SIMOX) Substrates," Proceedings of the 1994 IEEE Intern.  SOI Conf., 13-14, Oct. 1994.

 F.L. Duan, S.P. Sinha, D.E. Ioannou, and F.T. Brady, "LDD Design Tradeoffs for Single Transistor Latch-Up and Hot Carrier Degradation Control in Accumulation Mode FD SOI MOSFET's," IEEE Trans. Electron Devices, 44, 972-977, (1997).

 c) Hot Carrier and Radiation Reliability

 S. Cristoloveanu, S.M. Gulwadi, D.E. Ioannou, G.J. Campisi, and H.L. Hughes, Hot‑Carrier‑Induced Degradation of Front and Back Interfaces in Partially‑ and Fully‑ Depleted SIMOX MOSFET's", IEEE Electron Device Letters, 13, 603‑605 (1992).

 A. Zaleski, D.E. Ioannou, G.J. Campisi, and H.L. Hughes, "Successive Charging/Discharging of Gate Oxides in SOI MOSFET's by Sequential Hot‑Electron Stressing of Front/Back Channel", IEEE Electron Device Letters, 14, 435‑437 (1993).

 A. Zaleski, S.P. Sinha, D.E. Ioannou, G.J. Campisi, and H.L. Hughes, "Opposite‑Channel‑Based Charge Injection in SOI MOSFET's Under Hot Carrier Stress," IEEE Trans. on Electron Devices, 42, 1697-1700, (1995).  

 R.K. Lawrence, D.E. Ioannou, H.L. Hughes, P.J. McMar, and B.J. Mirtik, "Charge Trapping Versus Buried Oxide Thickness for SIMOX Structures," IEEE Trans. on Nuclear Science, 42, 2114-2121, (1995).

 R.K. Lawrence, D.E. Ioannou, “Electron Traps on High-Temperature Oxidized SIMOX Buried Oxides,”  IEEE Electron Device Letters, 17, 341-343, (1996).

 S.P. Sinha, A. Zaleski, D.E. Ioannou, G.J. Campisi, and H.L. Hughes , "Hot Hole Induced Interface State Generation and Annihilation in SOI MOSFET's," IEEE Electron Device Letters, 17, 121-123, (1996).

 S. P. Sinha, F. L. Duan, D. E. Ioannou, W. C. Jenkins, and H. L. Hughes, “Time Dependent Power Laws of Carrier Degradation in SOI MOSFETs”, Proceedings of the 1996 IEEE Intern. SOI Conf., 18-19, Oct. 1996.

 d) SOI CMOS Circuit Design

 N. Subba, A. Salman, S. Mitra, D.E. Ioannou and C.Tretz,  "Pseudo-nMOS Revisited: Impact of SOI on Low Power, High Speed Circuit Design, " Proceedings of the 2000 IEEE Intern. SOI Conf., 26-27, Oct. 2000.

 N. Subba, A. Salman, S. Mitra, D.E. Ioannou and C. Trez, "Design Considerations for SOI Charge Pump Circuits," 10^th Intern. Symp. SOI Technology and Devices, ECS Proc. Vol. 2001-3, pp.313-318.

 N. Subba, S. Mitra, A. Salman, and D.E. Ioannou "Device Physics Considerations for SOI Domino Circuit Design,” Proceedings of the 2001 Intern. Semiconductor Device Research Symposium, Washington DC, December 2001.

 B. OTHER (NON-SOI) SELECTED PUBLICATIONS

 D.E. Ioannou and S.M. Davidson,  "SEM Observation of Dislocations in Boron Implanted Silicon Using Schottky Barrier EBIC Technique,"  Phys. Stat. Sol. (a) 48,  K1‑K5 (1978).

 D.E. Ioannou and C.A. Dimitriadis, "A SEM‑EBIC Minority carrier Diffusion Length Measurement Technique," IEEE Trans. on Electron Devices ED‑29, 445‑450 (1982).

 D.E. Ioannou, "A SEM‑EBIC Minority Carrier Lifetime Measurement Technique," J. Phys. D:Appl. Phys. 13, 611‑617 (1980).

 D.E. Ioannou, N.A. Papanicolaou and P.E. Nordquist, Jr., "The Effect of Heat Treatment on Au Schottky Diodes on b‑SiC", IEEE Trans. on Electron Devices ED‑34, 1694‑1699 (1987).

 W.T. Anderson, J.A. Roussos, J.A. Mittereder, D.E. Ioannou, and C. Moglestue, “PHEMT MMIC Reliability Study,” Microelectronics Reliability, Vol. 41, pp. 1109-1113, August 2001.

 J.A. Mittereder, W.T. Anderson, J.A. Roussos and D.E. Ioannou, “Quantitative Measurement of Channel Temperature of GaAs Devices for Reliable Life-Time Prediction,”  To appear in IEEE Transactions on Reliability.

 F.A. Buot, J.A. Mittereder, D.E. Ioannou and W.T. Anderson,  "Transient thermal simulation of a 3-dimensional unit cell in power control systems and high-resolution local-temperature measurement technique," To appear in Solid State Electronics.