2001

P. Chodowiec, K. Gaj, P. Bellows, and B. Schott, "Experimental Testing of the Gigabit IPSec-Compliant Implementations of Rijndael and Triple DES Using SLAAC-1V FPGA Accelerator Board," Proc. Information Security Conference, Malaga, Spain, October 1-3, 2001 (in print) © Springer-Verlag [pdf, 152 kB]

K. Gaj and P. Chodowiec, "Fast implementation and fair comparison of the final candidates for Advanced Encryption Standard using Field Programmable Gate Arrays." Proc. RSA Security Conf. - Cryptographer's Track, San Francisco, CA, April 8-12, 2001, © Springer-Verlag [article: pdf, 134 kB, slides: pdf, 159 kB]

P. Chodowiec, P. Khuon, and K. Gaj
"Fast Implementations of Secret-Key Block Ciphers Using Mixed Inner- and Outer-Round Pipelining" ACM/SIGDA Ninth International Symposium  on Field Programmable Gate Arrays, Monterey, CA, February, 11-13, 2001 [article: 109 kB, slides: pdf, 113 kB]

2000

K. Gaj and P. Chodowiec, "Hardware performance of the AES finalists - survey and analysis of results," Technical Report, George Mason University, September 2000. [pdf, 275 kB]

K. Gaj and P. Chodowiec, "Comparing candidates for the new Advanced Encryption Standard using reconfigurable hardware," slides from the presentation in the Center for Secure Information Systems, GMU, July 19, 2000.

K. Gaj and P. Chodowiec,
"Comparison of the hardware performance of the AES candidates using reconfigurable hardware," Third Advanced Encryption Standard (AES) Candidate Conference, New York, April 13-14, 2000 [pdf, 598 kB]

Slides from the presentation at the AES3 conference.

1999

P. Chodowiec and K. Gaj,
"Implementations of the Twofish Cipher Using FPGA Devices," Technical Report, George Mason University, July 1999. [pdf, 352 kB]

Other Publications