"The Enigma Cipher: Methods of Breaking,"
K. Gaj,
Transport and Communications Press, Warsaw, Poland, 1989.

PRINTED LECTURE NOTES

“Introduction to Cryptography,” (in Polish)
K. Gaj, K. Gorski, R. Kossowski,
Warsaw University of Technology, 1994.

“Laboratory on Computer-Network Security,” (in Polish)
K. Gaj, K. Gorski, R. Kossowski,
Warsaw University of Technology, 1994.

REFEREED JOURNAL PUBLICATIONS

1. "Toward a Systematic Design Methodology for Large Multigigahertz Rapid Single Flux Quantum Circuits,"
   K. Gaj, Q. P. Herr, V. Adler, D. K. Brock, E. G. Friedman, and M.J. Feldman
   IEEE Trans. Appl. Supercond., vol. 9, 1999, pp. 4591-4606.
   
   
2. "Experimental Investigation of Local Timing Parameter Variations in RSFQ Circuits,"
   I. V. Vernik, Q. P. Herr, K. Gaj, and M. J. Feldman
   IEEE Trans. Appl. Supercond., vol. 9, 1999.
   
   
3. "Tools for the Computer-Aided Design of Multi-Gigahertz Superconducting Digital Circuits,"
   K. Gaj, Q.P. Herr, V. Adler, A. Krasniewski, E.G. Friedman, and M.J. Feldman
   IEEE Trans. Appl. Supercond., vol. 9, 1999, pp. 18-38.
   
   
4. "Timing of Multi-Gigahertz Rapid Single Flux Quantum Digital Circuits,"
   K. Gaj, E. G. Friedman, and M. J. Feldman,
   Journal of VLSI Signal Processing, vol. 16, 1997, pp. 247-276 (invited paper).
   
   
5. "Functional Modeling of RSFQ Circuits Using Verilog HDL,"
   K. Gaj, C.-H. Cheah, E. G. Friedman, and M. J. Feldman,
   IEEE Trans. Appl. Supercond., vol. 7, 1997, pp. 3151-3154.
   
   
6. "High Speed Testing of a Four-Bit RSFQ Decimation Digital Filter,"
   Q. P. Herr, K. Gaj, A. M. Herr, N. Vukovic, C. A. Mancini, M. F. Bocko, and M. J. Feldman,
   IEEE Trans. Appl. Supercond., vol. 7, 1997, pp. 2975-2978.
   
   
7. "A Cadence-Based Design Environment for Single Flux Quantum Circuits,"
   V. Adler, C.-H. Cheah, K. Gaj, D. K. Brock, and E. G. Friedman,
   IEEE Trans. Appl. Supercond., vol. 7, 1997, pp. 3294-3297.
   
   
8. "RSFQ Circular Shift Registers,"
   C. A. Mancini, N. Vukovic, A. M. Herr, K. Gaj, M. F. Bocko, and M. J. Feldman,
   IEEE Trans. Appl. Supercond., vol. 7, 1997, pp. 2832-2835.
   
   
9. "Design and Low Speed Testing of a Four-Bit RSFQ Multiplier-Accumulator,"
   Q. P. Herr, N. Vukovic, C. A. Mancini, K. Gaj, Q. Ke, V. Adler, E. G. Friedman, A. Krasniewski, M. F. Bocko, and M. J. Feldman,
   IEEE Trans. Appl. Supercond., vol. 7, 1997, pp. 3168-3171.
   
   
10. “A Clock Distribution Scheme for Large RSFQ Circuits,”
    K. Gaj, E. G. Friedman, M. J. Feldman, and A. Krasniewski,
    IEEE Trans. Appl. Supercond., vol. 5, no. 2, pp. 3320-3324, Jun. 1995.
    
    
11. “Parameter Variations and Synchronization of RSFQ Circuits,”
    K. Gaj, Q.P. Herr, and M.J. Feldman,
    Applied Superconductivity 1995, ed. Dew-Hughes, Institute of Physics, Bristol UK, 1995, pp. 1733-1736.
    
    
12. "Polish Cipher Machine - Lacida,"
    K. Gaj,
    Cryptologia, vol. XVI, no. 1, pp.73-80, Jan. 1992.

REFEREED CONFERENCE PUBLICATIONS

1. "Passing year in cryptography and cryptanalysis - survey of the recent events and tendencies,"
   K. Gaj
   Proc. 3rd National Conference on Applications of Cryptography, ENIGMA'99, Warsaw, Poland, May 1999, pp. 31-53 (invited talk).
   
   

2. "Elliptic Curve Cryptosystems vs. RSA - triumph of one technology, or permanent division of the market?,"
   K. Gaj
   Proc. 3rd National Conference on Applications of Cryptography, ENIGMA'99, Warsaw, Poland, pp. 129-146.
   
   

3. "Choice of the Optimum Timing Scheme for RSFQ Digital Circuits,"
   K. Gaj, E. G. Friedman, and M. J. Feldman,
   Proc. 5th Int. Workshop on High-Temp. Supercond. Electr. Dev., Matsuyama, Japan, May 1997, pp. 39-40 (invited paper).
   
   

4. "Timing of Large RSFQ Digital Circuits,"
   K. Gaj, E. G. Friedman, and M. J. Feldman,
   Ext. abs. 6th Int. Supercond. Electr. Conf., ISEC'97, Berlin, Germany, 1997.
   
   

5. "Two-Phase Clocking for Medium to Large RSFQ Circuits,"
   K. Gaj, E. G. Friedman, and M. J. Feldman,
   Ext. abs. 6th Int. Supercond. Electr. Conf., ISEC'97, Berlin, Germany, 1997.
   
   

6. “Is there any Future for Deterministic Self-Test of Embedded RAMs?”
   A. Krasniewski and K. Gaj,
   Proc. European Test Conf., pp. 159-168, Rotterdam, 1993.
   
   

7. “HEART - Implementation of Security Services for Electronic Data Interchange,”
   K. Gaj, K. Gorski, and R. Kossowski,
   Proc. EDI Conf., Lodz, Poland, 1993.
   
   

8. “Implementation of Security Services in Public Computer Networks,”
   K. Gaj, K. Gorski, and R. Kossowski,
   Proc. National Symp. on Telecomm. - KST'93, Bydgoszcz, Poland, 1993.
   
   

9. "Methods of Protection against Computer Viruses,"
   K. Gaj, K. Gorski, R. Kossowski, and J. Sobczyk,
   Proc. SAFECOMP'90 Conf., pp.43-48, Gatwick, UK, 1990.
   
   

10. "Strategy of Selection of Algorithms for Software Implementation of the RSA Cryptosystem,”
    K. Gaj,
    Proc. National Symp. on Telecomm. - KST'90, vol. C, pp. 202-212, Bydgoszcz, Poland, 1990.
    (first award in the contest for the best paper presented by a young investigator)
    
    

11. "Optimization of Algorithms and Data Structures in Simulation of Digital Circuits with Min-Max Timing Parameters,”
    A. Krasniewski and K. Gaj,
    Proc. National Symp. on Telecomm. - KST'90, vol. B, pp. 36-43, Bydgoszcz, Poland, 1990.
    
    

12. "High Accuracy Design Evaluation System - HADES,"
    A. Krasniewski, K. Gaj, W. Murzyn, and L.B. Wronski,
    Proc. National Symp. on Telecomm. - KST'90, Bydgoszcz, Poland, 1990.
    
    

13. "High-Accuracy Design Evaluation System in Teaching a Course on Digital Circuit Design,”
    W. Murzyn and K. Gaj,
    Proc. National Symp. on Telecomm. - KST'91, vol. B, pp. 64-73, Bydgoszcz, Poland, 1991.
    
    

14. "Simulator of Digital Circuits with Functional Modeling of Elements,”
    K. Gaj, A. Krasniewski, W. Murzyn, and L.B. Wronski,
    Proc. National Symp. on Telecomm. - KST'89, vol. B, pp. 54-63,
    Bydgoszcz, Poland, 1989.
    
    

15. "A Hybrid Cryptographic Protocol for Secure Communication in Public Telecommunication Networks,”
    K. Gaj and A. Pierzynska,
    Proc. RELCOMEX'89 Conf., pp. 535-542, Ksiaz Castle, 1989.

SELECTED TECHNICAL REPORTS

1. “Circular Self-Test Path: Fault Coverage for Benchmark Circuits,”
   A. Pierzynska, K. Gaj, and S. Pilarski,
   Simon Fraser University, Center for System Science CSS/LCCR, TR93-08, Aug. 1993.
   
   

2. “Selection of Algorithms for Software Implementation of the RSA Cryptosystem,”
   K. Gaj,
   Simon Fraser University, Center for System Science CSS/LCCR, TR91-10, Oct. 1991.
   
   

3. Q. Herr and K. Gaj, "MALT - Multi-parameter Optimization Utility for Rapid Single Flux-Quantum Digital Circuits", Department of Electrical Engineering, University of Rochester, Sep. 1994.