CHES

Workshop on Cryptographic Hardware and Embedded Systems 2002 (CHES 2002)

Hotel Sofitel, San Francisco Bay (Redwood City), USA
August 13 - 15, 2002

Monday, August 12th

Tuesday, August 13th

Wednesday, August 14th

Thursday, August 15th

Presentations

Tuesday, August 13th
Time Event
8:30 - 8:45 Welcome
  Session Authors Talk's Title
8:45 - 9:10 Invited Talk Jean-Jacques Quisquater (UCL, BE) CHES: Past Present and Future
9:10 - 10:25 Session 1: Attack Strategies S. Skorobogatov and R. Anderson (U Cambridge, UK) Optical Fault Induction Attacks
[pdf, 3387 kB]
S. Chari, J.R. Rao, and P. Rohatgi (IBM, US) Template Attacks
[ppt, 1509 kB] [pdf, 1998 kB]
D. Agrawal, B. Archambeault, J.R. Rao, and P. Rohatgi (IBM, US) The EM Side-channel(s)
[ppt, 1340 kB] [pdf, 352 kB]
10:25 - 10:45 Break
10:45 - 12:00 Session 2: Finite Field and Modular Arithmetic I S. Gueron (University of Haifa, IL, and Discretix Technologies, IL) Enhanced Montgomery Multiplication
R. Lórencz (CTU in Prague, CZ) New Algorithm for Classical Modular Inverse
[ppt, 965 kB] [pdf, 135 kB]
W. Fischer and J.-P. Seifert (Infineon, DE) Increasing the bitlength of crypto-coprocessors via smart hardware/software codesign
12:00 - 13:20 Lunch
13:20 - 15:00 Session 3: Elliptic Curve Cryptography I E. Oswald (TU-Graz, AT) Enhancing Simple Power-Analysis Attacks on Elliptic Curve Cryptosystems
[pdf, 207 kB]
E. Trichina (Gemplus, IT) and A. Bellezza (University of Rome "La Sapienza", IT) Implementation of Elliptic curve cryptography with built-in counter measures against side channel attacks
C. Gebotys and R. Gebotys (U Waterloo, CA) Secure Elliptic Curve Implementations: An analysis of resistance to power-attacks in a DSP processor core
[ppt, 1322 kB] [pdf, 893 kB]
K. Itoh, T. Izu, and M. Takenaka (Fujitsu, JP) Address-bit Differential Power Analysis on Cryptographic Schemes OK-ECDH and OK-ECDSA
[ppt, 1935 kB] [pdf, 780 kB]
15:00 - 15:20 Break
15:20 - 17:25 Session 4: AES and AES Candidates A. K. Lutz, J. Treichler, F.K. Gurkaynak, H. Kaeslin, G. Basler, A. Erni, S. Reichmuth, P. Rommens, S. Oetiker, and W. Fichtner (ETH, CH) 2Gbit/s Hardware Realizations of RIJNDAEL and SERPENT: A comparative analysis
[ppt, 920 kB] [pdf, 1399 kB]
G. Bertoni, L. Breveglieri (Politecnico di Milano, IT), P. Fragneto (STMicroelectronics, IT), M. Macchetti, and S. Marchesin (ALARI, University of Italian Switzerland, Lugano, CH) Efficient Software Implementation of AES on 32-bits Platforms
[ppt, 310 kB] [pdf, 361 kB]
S. Morioka and A. Satoh (IBM, JP) An Optimized S-Box Circuit Architecture for Low Power AES Design
[pdf, 361 kB]
E. Trichina, D. De Seta, and L. Germani (Gemplus, IT) Simplified adaptive multiplicative masking for AES and its secure implementation
J. Dj. Golic (Gemplus, IT) and C. Tymen (Gemplus, FR) Multiplicative masking and power analysis of AES
[ppt, 353 kB] [pdf, 316 kB]
17:25 - 17:50 Session 5: Tamper Resistance A. Huang (MIT, US) Keeping Secrets in Hardware: the Microsoft X-BOX Case Study
[pdf, 3784 kB]
17:50 Adjourn

Wednesday, August 14th
Time Event
  Session Authors Talk's Title
08:45 - 10:00 Session 6: RSA Implementation B. den Boer (TNO TPD, NL), K. Lemke, and G. Wicke (T-Systems, DE) A DPA Attack Against the Modular Reduction within a CRT Implementation of RSA
[pdf, 1089 kB]
V. Klima and T. Rosa (ICZ, CZ) Further Results and Considerations on Side Channel Attacks on RSA
[ppt, 705 kB] [pdf, 1565 kB]
C. Aumueller, P. Bier, W. Fischer, P. Hofreiter, and J.-P. Seifert (Infineon, DE) Fault attacks on RSA with CRT: Concrete Results and Practical Countermeasures
10:00 - 10:20 Break
10:20 - 12:00 Session 7: Finite Field and Modular Arithmetic II C.D. Walter (Comodo, UK) Some Security Aspects of the Mist Randomized Exponentiation Algorithm
[ppt, 260 kB] [pdf, 283 kB]
M. Joye (Gemplus, FR) and S-M. Yen (Nat. Central U, TW) The Montgomery Powering Ladder
[pdf, 833 kB]
K. Itoh, J. Yajima, M. Takenaka, and N. Torii (Fujitsu, JP) DPA Countermeasures by improving the window method
[ppt, 359 kB] [pdf, 624 kB]
M. Stam (TU Eindhoven, NL) and A.K. Lenstra (Citi, US) Efficient subgroup exponentiation in quadratic and sixth degree extensions
12:00 - 13:20 Lunch
13:20 - 15:25 Session 8: Elliptic Curve Cryptography II E. Konstantinou, Y. Stamatiou, and C. Zaroliagis (U Patras, GR) On the efficient generation of elliptic curves over prime fields
[ppt, 267 kB] [pdf, 378 kB]
N. Gura, S. Chang Shantz, H. Eberle (Sun Microsystems, US), D. Finchelstein (U Waterloo, CA), S. Gupta, V. Gupta, and D. Stebila (Sun Microsystems, US) An End-to-End Systems Approach to Elliptic Curve Cryptography
[pdf, 632 kB]
R. Schroeppel, C. Beaver, R. Gonzales, R. Miller, and T. Draelos (Sandia, US) A Low-Power Design for an Elliptic Curve Digital Signature Chip
[pdf, 584 kB]
M. Ernst, M. Jung, F. Madlener, S.A. Huss (TU Darmstadt, DE), and R. Bluemel (Cryptovision, DE) A Reconfigurable System on Chip Implementation for Elliptic Curve Cryptography over GF(2^n)
[ppt, 679 kB] [pdf, 1103 kB]
N. Boston, T.C. Clancy, Y. Liow, and J.E. Webster (Urbana-Champaign, US) Genus Two Hyperelliptic Curve Coprocessor
[pdf, 123 kB]
15:25 - 15:45 Break
15:45 - 16:10 Session 9: Random Number Generation V. Fischer (U Jean Monnet, FR) and M. Drutarovsky (U Kosice, SL) True Random Number Generator Embedded in Reconfigurable Hardware
[ppt, 1214 kB] [pdf, 2206 kB]
16:10 - 17:40 Invited Panel Werner Schindler (BSI, DE) (moderator), Randall J. Easter (NIST, US), Paul Timmel (NSA, US), and Thomas E. Tkacik (Motorola, US) Hardware Random Number Generation
W. Schindler: [ppt, 188 kB] [pdf, 46 kB]
R. J. Easter: [ppt, 438 kB] [pdf, 636 kB]
P. Timmel: [ppt, 221 kB] [pdf, 298 kB]
T. E. Tkacik: [ppt, 379 kB] [pdf, 170 kB]
17:40 Adjourn

Thursday, August 15th
Time Event
  Session Authors Talk's Title
08:35 - 09:35 Invited Talk Sanjay Sarma (MIT, US) Radio Frequency Identification Systems
09:35 - 09:55 Break
09:55 - 10:20 Session 10: New Primitives A. Klimov and A. Shamir (Weizmann, IL) A New Class of Invertible Mappings
10:20 - 12:00 Session 11: Finite Field and Modular Arithmetic III A. A-A. Gutub, A. F. Tenca, E. Savas, and C.K. Koc (Oregon State U, US) Scalable and Unified Hardware to Compute Montgomery Inverse in GF(p) and GF(2^n)
[ppt, 586 kB] [pdf, 425 kB]
J. Wolkerstorfer (TU-Graz, AT) Dual-Field Arithmetic Unit for GF(p) and GF(2^m)
[pdf, 163 kB]
A. Reyhani-Masoleh and A. Hasan (U Waterloo, CA) Error Detection in Polynomial Basis Multipliers over Binary Extension Fields
[pdf, 259 kB]
D. Page and N. Smart (U Bristol, UK) Hardware implementation of finite fields of characteristic three
12:00 - 13:20 Lunch
13:20 - 14:35 Session 12: Elliptic Curve Cryptography III M. Ciet, J-J. Quisquater, and F. Sica (UCL, BE) Preventing Differential Analysis in GLV Elliptic Curve Scalar Multiplication
[pdf, 1128 kB]
J.C. Ha (Korea Nazarene U, KR) and S.J. Moon (Kyungpook National U, KR) Randomized Signed-Scalar Multiplication of ECC to Resist Power Attacks
[ppt, 994 kB]
K. Okeya (Hitachi, JP) and K. Sakurai (Kyushu University, JP) Fast Multi-Scalar Multiplication Methods on Elliptic Curves with Precomputation Strategy using Montgomery Trick
[ppt, 1563 kB] [pdf, 1041 kB]
14:35 - 15:25 Session 13: Hardware for Cryptanalysis R. Clayton and M. Bond (U Cambridge, UK) Experience Using a Low-Cost FPGA Design to Crack DES Keys
[pdf, 298 kB]
F-X. Standaert, G. Rouvroy, J-J. Quisquater, and J-D. Legat (UCL, BE) A Time-Memory Tradeoff using Distinguished Points: New Analysis & FPGA Results
15:25 Adjourn


CHES Main Page
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Last update: September 16, 2002.