Lecture 7a
Introduction to FPGA tools for synthesis and implementation

Example: Minimum, Maximum, Average

Source files:

components.vhd    exam1.vhd    regne.vhd    upcount.vhd    RAM_16Xn_DISTRIBUTED.vhd

exam1_TB.vhd

Input file:

inputs.txt

Block diagrams and ASM charts:

execution_unit.jpg         control_unit.jpg        asm_chart.jpg