AVG_OF_4_TB.vhd    AVG_OF_4.vhd    REGISTER_GENERIC.vhd

        Waveform_Midterm_Tu_S05.awf

The circuit accepts 4 data inputs and stores them in 4 registers. Each of these data values is added serially in an adder, and after 4 additions, the sum is shifted left by 2 bit positions (equivalent to division by 4). The shifted sum (average of 4 numbers) is then output through a tri-state buffer when OUT_EN is low.